Front and Backside FIB Circuit modification services | Backside Sample Preparation
ACE offers both Frontside and full-thickness Backside FIB Circuit Editing down to 5nm process tech-nodes.
ADVANCED CAPABILITIES
5nm FinFET, 14/16nm FinFET, 28nm: Front & Backside FIB circuit edits.
STANDARD CAPABILITIES
40nm, 45nm, 65nm, .13um, .18um, .25um, .35um: Front & Backside FIB circuit modification.
FULL THICKNESS BACKSIDE FIB EDIT
No sample preparation required. Maintains silicon integrity / thermal properties.
EXPERIENCE / YIELD
Over 50-years experience (+ 50,000 hours) techniques and innovative FIB circuit edit expertise.
PACKAGE TYPE
BGA, QFN, CSP, WLBGA, 8″ wafer, packaged “flip-chip”, die level
WAFER SIZE ACCOMMODATIONS
BACKSIDE SAMPLE PREPARATION
Mechanical polish of bulk SI down to ~100um for flip-chip “backside” editing.