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FIB Circuit Edit | Backside FIB Circuit Edit | FlipChip IC Sample preparation

FIB Circuit Edit


ADVANCED FIB CIRCUIT EDIT

Front and Backside FIB Circuit modification services | Backside Sample Preparation

ACE provides rapid silicon validation and precision nano-machining for technology nodes down to 5nm FinFET.

Accelerating the Debug Cycle

FIB (Focused Ion Beam) Circuit Edit is a critical surgical tool for IC designers. It allows for real-time “cut and paste” of circuit geometry directly on the die, enabling design teams to verify fixes before committing to a costly and time-consuming mask re-spin.

Our laboratory utilizes advanced proprietary chemistries & techniques and high-resolution ion optics to navigate complex multi-layer metal stacks. Whether you are performing metal-fix verification for AI accelerators or creating probe pads for deep-node signal acquisition, ACE delivers the surgical precision required for modern silicon.

Precision Milling: Disconnecting metal traces with sub-10nm accuracy.
Deposition: High-aspect ratio jumper connections.
Backside Access: Edit through full-thickness silicon for flip-chips.
Node Access: Micro-probing pads for electrical characterization.

RESULTS-DRIVEN

  • Proven 5nm FIB circuit edit success.
  • Full thickness FIB Backside edit.
  • Front & Backside FIB circuit edits.
  • 12″ full wafer FIB edit compatibility.
  • High-precision FIB nano-machining.

EFFICIENT EXECUTION

  • Engineering on Demand: Priority-access scheduling for critical projects.
  • Discounts for project-based volume work.
  • Rapid technical turnaround cycles.
  • Secure Logistics: Professional chain-of-custody handling and sample integrity.

EXPERT CONSULTATION

  • Advanced GDS-II/Layout FIB design review.
  • Direct collaboration with your engineering team to maximize edit yield.
  • Feasibility studies for deep-node architectures.

CAPABILITIES AND INFORMATION

FIB Cross section Lamella prep Nanolab 660
FIB CIRCUIT EDIT

ADVANCED CAPABILITIES
5nm FinFET, 14/16nm FinFET, 28nm: Front & Backside FIB circuit edits.

STANDARD CAPABILITIES
40nm, 45nm, 65nm, .13um, .18um, .25um, .35um: Front & Backside FIB circuit modification.

FULL THICKNESS BACKSIDE FIB EDIT
No sample preparation required. Maintains silicon integrity and thermal properties.

EXPERIENCE / YIELD
Over 20 years of specialized expertise with 50,000+ hours of innovative FIB circuit edit leadership.

PACKAGE TYPE
BGA, QFN, CSP, WLBGA, 8″ wafer, packaged “flip-chip”, die level.

WAFER SIZE ACCOMMODATIONS

  • 4″, 6″, 8″ and 12″ wafers.
  • 300mm (12″ full-wafer) FIB Circuit edit capacity.

BACKSIDE SAMPLE PREPARATION
Mechanical bulk silicon thinning and polishing down to ~100um for specialized flip-chip editing.

FIB Gallery